Japanese Patent Application No. 2001-88309, filed on Mar. 26, 2001, and Japanese Patent Application No. 2001-330784, filed on Oct. 29, 2001 are hereby incorporated by reference in their entirety.
The present invention relates to semiconductor devices, such as, for example, static random access memories (SRAMs), and memory systems and electronic apparatuses provided with the same.
SRAMs, one type of semiconductor memory devices, do not require a refreshing operation and therefore have a property that can simplify the system and lower power consumption. For this reason, the SRAMs are prevailingly used as memories for electronic equipment, such as, for example, mobile phones.
The present invention may provide a semiconductor device that can reduce its cell area.
The present invention may further provide a memory system and an electronic apparatus that includes a semiconductor device in accordance with the present invention.
1. Semiconductor Device
A semiconductor device according to a first aspect of the present invention includes a first gatexe2x80x94gate electrode layer including a gate electrode of a first load transistor and a gate electrode of a first driver transistor and a second gatexe2x80x94gate electrode layer including a gate electrode of a second load transistor and a gate electrode of a second driver transistor. The semiconductor device also includes a first drainxe2x80x94drain wiring layer which forms a part of a connection layer that electrically connects a drain region of the first load transistor and a drain region of the first driver transistor and a second drainxe2x80x94drain wiring layer which forms a part of a connection layer that electrically connects a drain region of the second load transistor and a drain region of the second driver transistor. The semiconductor device further includes a first drain-gate wiring layer which forms a part of a connection layer that electrically connects the first gatexe2x80x94gate electrode layer and the second drainxe2x80x94drain wiring layer and a second drain-gate wiring layer which forms a part of a connection layer that electrically connects the second gatexe2x80x94gate electrode layer and the first drainxe2x80x94drain wiring layer, wherein the first drain-gate wiring layer and the second drain-gate wiring layer are located in different layers, respectively, and wherein a width of the first gatexe2x80x94gate electrode layer in the first load transistor is larger than the width of the first gatexe2x80x94gate electrode layer in the first driver transistor.
2. Memory System
A memory system in accordance with a second aspect of the present invention is provided with the semiconductor device of the first aspect of the present invention.
3. Electronic Apparatus
An electronic apparatus in accordance with a third aspect of the present invention is provided with the semiconductor device of the first aspect of the present invention.